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Keerthikumara Devarajegowda

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

13

Venues

6

Active years

2017–2024

Best venue rank

A*

Where they publish

Papers

13 indexed papers, newest first.

YearVenueTitleAuthors
2024DACMCU-Wide Timing Side Channels and Their Detection.Johannes Mller, Anna Lena Duque Antn, Lucas Deutschmann, Dino Mehmedagic, Cristiano Rodrigues, Daniel Oliveira, Mohammad Rahmani Fadiheh, Keerthikumara Devarajegowda, Sandro Pinto, Dominik Stoffel, Wolfgang Kunz
2023DACG-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators.Saranyu Chattopadhyay, Keerthikumara Devarajegowda, Bihan Zhao, Florian Lonsing, Brandon A. D'Agostino, Ioanna Vavelidou, Vijay Deep Bhatt, Sebastian Prebeck, Wolfgang Ecker, Caroline Trippel, Clark W. Barrett, Subhasish Mitra
2021DACISA Modeling with Trace Notation for Context Free Property Generation.Keerthikumara Devarajegowda, Endri Kaja, Sebastian Siegfried Prebeck, Wolfgang Ecker
2020DATEGap-free Processor Verification by SKeerthikumara Devarajegowda, Mohammad Rahmani Fadiheh, Eshan Singh, Clark W. Barrett, Subhasish Mitra, Wolfgang Ecker, Dominik Stoffel, Wolfgang Kunz
2019DACIncreasing Soft Error Resilience by Software Transformation.Michael Werner, Keerthikumara Devarajegowda, Moomen Chaari, Wolfgang Ecker
2019DATEEmbedded Systems' Automation following OMG's Model Driven Architecture Vision.Wolfgang Ecker, Keerthikumara Devarajegowda, Michael Werner, Zhao Han, Lorenzo Servadei
2019DATEAccurate Cost Estimation of Memory Systems Inspired by Machine Learning for Computer Vision.Lorenzo Servadei, Elena Zennaro, Keerthikumara Devarajegowda, Martin Manzinger, Wolfgang Ecker, Robert Wille
2019DATESymbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study.Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra
2019DSDFormal Verification Methodology in an Industrial Setup.Lorenzo Servadei, Zhao Han, Michael Werner, Wolfgang Ecker, Keerthikumara Devarajegowda
2018DSDA Machine Learning Approach for Area Prediction of Hardware Designs from Abstract Specifications.Elena Zennaro, Lorenzo Servadei, Keerthikumara Devarajegowda, Wolfgang Ecker
2018ICTAIQuality Assessment of Generated Hardware Designs Using Statistical Analysis and Machine Learning.Lorenzo Servadei, Elena Zennaro, Keerthikumara Devarajegowda, Wolfgang Ecker, Robert Wille
2017ICCADPython based framework for HDSLs with an underlying formal semantics: (Invited paper).Keerthikumara Devarajegowda, Johannes Schreiner, Rainer Findenig, Wolfgang Ecker
2017RSPThe extendable translating instruction set simulator (ETISS) interlinked with an MDA framework for fast RISC prototyping.Daniel Mueller-Gritschneder, Keerthikumara Devarajegowda, Martin Dittrich, Wolfgang Ecker, Marc Greim, Ulf Schlichtmann