Khyamling Parane
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2018–2018
Best venue rank
National
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2018 | VLSID | YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine Using FPGAs. | Khyamling Parane, Basavaraj Talawar, Prabhu B. M. Prasad |