King Ho Tam
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
4
Active years
2005–2015
Best venue rank
A*
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | DAC | Criticality-dependency-aware timing characterization and analysis. | Yu-Ming Yang, King Ho Tam, Iris Hui-Ru Jiang |
| 2014 | ICCAD | Design and manufacturing process co-optimization in nano-technology. | Meng-Kai Hsu, Nitesh Katta, Homer Yen-Hung Lin, Keny Tzu-Hen Lin, King Ho Tam, Ken Chung-Hsing Wang |
| 2008 | DAC | Challenges in gate level modeling for delay and SI at 65nm and below. | Igor Keller, King Ho Tam, Vinod Kariat |
| 2005 | DAC | Power optimal dual-Vdd buffered tree considering buffer stations and blockages. | King Ho Tam, Lei He |
| 2005 | DATE | Buffer Insertion Considering Process Variation. | Jinjun Xiong, King Ho Tam, Lei He |
| 2005 | ISLPED | Power-optimal repeater insertion considering Vdd and Vth as design freedoms. | Yu Ching Chang, King Ho Tam, Lei He |