Kishor Kunal
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
12
Venues
5
Active years
2019–2025
Best venue rank
A*
Where they publish
Papers
12 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | DAC | INSTA: An Ultra-Fast, Differentiable, Statistical Static Timing Analysis Engine for Industrial Physical Design Applications. | Yi-Chen Lu, Zhizheng Guo, Kishor Kunal, Rongjian Liang, Haoxing Ren |
| 2024 | ASPDAC | Reinforcing the Connection between Analog Design and EDA (Invited Paper). | Kishor Kunal, Meghna Madhusudan, Jitesh Poojary, S. Ramprasath, Arvind K. Sharma, Ramesh Harjani, Sachin S. Sapatnekar |
| 2024 | ASPDAC | Automated synthesis of mixed-signal ML inference hardware under accuracy constraints. | Kishor Kunal, Jitesh Poojary, S. Ramprasath, Ramesh Harjani, Sachin S. Sapatnekar |
| 2024 | ICCAD | Generative Methods in EDA: Innovations in Dataset Generation and EDA Tool Assistants. | Vidya A. Chhabria, Bing-Yue Wu, Utsav Sharma, Kishor Kunal, Austin Rovinski, Sachin S. Sapatnekar |
| 2023 | ISLPED | A Multicore GNN Training Accelerator. | Sudipta Mondal, Ramprasath S, Ziqing Zeng, Kishor Kunal, Sachin S. Sapatnekar |
| 2022 | DAC | GNNIE: GNN inference engine with load-balancing and graph-specific caching. | Sudipta Mondal, Susmita Dey Manasi, Kishor Kunal, Ramprasath S, Sachin S. Sapatnekar |
| 2021 | ASPDAC | Fast and Efficient Constraint Evaluation of Analog Layout Using Machine Learning Models. | Tonmoy Dhar, Jitesh Poojary, Yaguang Li, Kishor Kunal, Meghna Madhusudan, Arvind K. Sharma, Susmita Dey Manasi, Jiang Hu, Ramesh Harjani, Sachin S. Sapatnekar |
| 2021 | ICCAD | BeGAN: Power Grid Benchmark Generation Using a Process-portable GAN-based Methodology. | Vidya A. Chhabria, Kishor Kunal, Masoud Zabihi, Sachin S. Sapatnekar |
| 2020 | DATE | GANA: Graph Convolutional Network Based Automated Netlist Annotation for Analog Circuits. | Kishor Kunal, Tonmoy Dhar, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Jiang Hu, Ramesh Harjani, Sachin S. Sapatnekar |
| 2020 | ICCAD | The ALIGN Open-Source Analog Layout Generator: v1.0 and Beyond (Invited talk). | Tonmoy Dhar, Kishor Kunal, Yaguang Li, Yishuang Lin, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar |
| 2020 | ICCAD | A general approach for identifying hierarchical symmetry constraints for analog circuit layout. | Kishor Kunal, Jitesh Poojary, Tonmoy Dhar, Meghna Madhusudan, Ramesh Harjani, Sachin S. Sapatnekar |
| 2019 | DAC | ALIGN: Open-Source Analog Layout Automation from the Ground Up. | Kishor Kunal, Meghna Madhusudan, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Desmond A. Kirkpatrick, Sachin S. Sapatnekar |