Koichiro Ishibashi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
1998–2011
Best venue rank
C
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2011 | DDECS | Decoupling capacitance boosting for on-chip resonant supply noise reduction. | Jinmyoung Kim, Toru Nakura, Hidehiro Takata, Koichiro Ishibashi, Makoto Ikeda, Kunihiro Asada |
| 2005 | ICCAD | Worst-case analysis to obtain stable read/write DC margin of high density 6T-SRAM-array with local Vth variability. | Yasumasa Tsukamoto, Koji Nii, Susumu Imaoka, Yuji Oda, Shigeki Ohbayashi, Tomoaki Yoshizawa, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara |
| 1998 | ISLPED | A delay distribution squeezing scheme with speed-adaptive threshold-voltage CMOS (SA-Vt CMOS) for low voltage LSIs. | Masayuki Miyazaki, Hiroyuki Mizuno, Koichiro Ishibashi |