Koji Kai
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
1998–1999
Best venue rank
A*
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1999 | HPCA | Dynamically Variable Line-Size Cache Exploiting High On-Chip Memory Bandwidth of Merged DRAM/Logic LSIs. | Koji Inoue, Koji Kai, Kazuaki J. Murakami |
| 1998 | ISLPED | Optimizing the DRAM refresh count for merged DRAM/logic LSIs. | Taku Ohsawa, Koji Kai, Kazuaki J. Murakami |