Kotaro Shimamura
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
4
Active years
1995–2012
Best venue rank
A
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | ITC | DART: Dependable VLSI test architecture and its implementation. | Yasuo Sato, Seiji Kajihara, Tomokazu Yoneda, Kazumi Hatayama, Michiko Inoue, Yukiya Miura, Satosni Untake, Takumi Hasegawa, Motoyuki Sato, Kotaro Shimamura |
| 2006 | PRDC | A Single-Chip Fail-Safe Microprocessor with Memory Data Comparison Feature. | Kotaro Shimamura, Takeshi Takehara, Yosuke Shima, Kunihiko Tsunedomi |
| 1998 | RTAS | A Triple Redundant Controller which Adopts the Time-Sharing Fault Recovery Method and its Application to a Power Converter Controller. | Kotaro Shimamura, Yuichiro Morita, Yoshitaka Takahashi, Takashi Hotta, Shigeta Ueda, Mikiya Nohara, Mitsuyasu Kido, Seji Tanaka, Kazuhiro Imaie, Koji Sakamoto, Tatsuhito Nakajima |
| 1995 | ICCD | A superscalar RISC processor with pseudo vector processing feature. | Kotaro Shimamura, Shigeya Tanaka, Tetsuya Shimomura, Takashi Hotta, Eiki Kamada, Hideo Sawamoto, Teruhisa Shimizu, Kisaburo Nakazawa |