Krashna Nand Mishra
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
2019–2021
Best venue rank
National
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2021 | VLSID | Creating Fastest Self timing Reference Path for High Speed Memory Designs. | Krashna Nand Mishra, Yogeshbhai Vallabhbhai Patel |
| 2019 | VLSID | Allowing Switching off Periphery Voltage Island Instead of Doing it per Instance Through Periphery VDD Collapse in SRAMs. | Krashna Nand Mishra, Ruchin Jain, Shailendra Sharad, Ravindra Shrivastava |