| 2007 | DAC | An Analysis of Timing Violations Due to Spatially Distributed Thermal Effects in Global Wires. | Krishnan Sundaresan, Nihar R. Mahapatra |
| 2006 | DATE | Value-based bit ordering for energy optimization of on-chip global signal buses. | Krishnan Sundaresan, Nihar R. Mahapatra |
| 2006 | ICCD | Fast, Performance-Optimized Partial Match Address Compression for Low-Latency On-Chip Address Buses. | Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra |
| 2005 | HPCA | Accurate Energy Dissipation and Thermal Modeling for Nanometer-Scale Buses. | Krishnan Sundaresan, Nihar R. Mahapatra |
| 2005 | VLSID | Energy-Efficient Compressed Address Transmission. | Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra |
| 2005 | VLSID | An Accurate Energy and Thermal Model for Global Signal Buses. | Krishnan Sundaresan, Nihar R. Mahapatra |
| 2004 | ICCD | Dynamic Address Compression Schemes: A Performance, Energy, and Cost Study. | Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra |
| 2003 | ICCD | Hardware-Only Compression of Underutilized Address Buses: Design and Performance, Power, and Cost Analysis. | Nihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan |
| 2003 | IPCCC | The potential of compression to improve memory system performance, power consumption, and cost. | Nihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan, Srinivas Dangeti, Balakrishna V. Venkatrao |