Leandro Mller
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
2
Active years
2003–2010
Best venue rank
B
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2010 | FPL | Improving QoS of Multi-layer Networks-on-Chip with Partial and Dynamic Reconfiguration of Routers. | Leandro Mller, Peter Fischer, Fernando Moraes, Leandro Soares Indrusiak, Manfred Glesner |
| 2009 | FPL | Towards a unique FPGA-based identification circuit using process variations. | Haile Yu, Philip Heng Wai Leong, Heiko Hinkelmann, Leandro Mller, Manfred Glesner, Peter Zipf |
| 2006 | FPL | Reconfigurable Systems Enabled by a Network-on-Chip. | Leandro Mller, Ismael Grehs, Ney Calazans, Fernando Moraes |
| 2004 | DATE | MultiNoC: A Multiprocessing System Enabled by a Network on Chip. | Aline Mello, Leandro Mller, Ney Calazans, Fernando Gehm Moraes |
| 2004 | FPL | FiPRe: An Implementation Model to Enable Self-Reconfigurable Applications. | Leandro Mller, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Eduardo Wenzel Brio, Ewerson Carvalho, Daniel Camozzato |
| 2003 | DATE | Development of a Tool-Set for Remote and Partial Reconfiguration of FPGAs. | Fernando Gehm Moraes, Daniel Mesquita, Jos Carlos S. Palma, Leandro Mller, Ney Laert Vilar Calazans |