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Levent Aksoy

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

21

Venues

10

Active years

2006–2025

Best venue rank

A*

Where they publish

Papers

21 indexed papers, newest first.

YearVenueTitleAuthors
2025DATELate Breaking Results: Is Reconfigurable-Based Obfuscation Secure?Zain Ul Abideen, Levent Aksoy, Samuel Pagliarini
2024ASPDACMultiplierless Design of High-Speed Very Large Constant Multiplications.Levent Aksoy, Debapriya Basu Roy, Malik Imran, Samuel Pagliarini
2024DATEKRATT: QBF-Assisted Removal and Structural Analysis Attack Against Logic Locking.Levent Aksoy, Muhammad Yasin, Samuel Pagliarini
2022DDECSHardware Obfuscation of Digital FIR Filters.Levent Aksoy, Alexander Hepp, Johanna Baehr, Samuel Pagliarini
2021IOLTSHigh-level Intellectual Property Obfuscation via Decoy Constants.Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini
2020DATECMOS Implementation of Switching Lattices.Ismail Cevik, Levent Aksoy, Mustafa Altun
2020ISCASA Novel Method for the Realization of Complex Logic Functions using Switching Lattices.Levent Aksoy, Mustafa Altun
2020ISCASEfficient Time-Multiplexed Realization of Feedforward Artificial Neural Networks.Levent Aksoy, Sajjad Parvin, Mohammadreza Esmali Nojehdeh, Mustafa Altun
2019DATEA Satisfiability-Based Approximate Algorithm for Logic Synthesis Using Switching Lattices.Levent Aksoy, Mustafa Altun
2019DATERealization of Four-Terminal Switching Lattices: Technology Development and Circuit Modeling.Serzat Safaltin, Oguz Gencer, Muhammed Ceylan Morgl, Levent Aksoy, Sebahattin Gurmen, Csaba Andras Moritz, Mustafa Altun
2015EUCA Novel Method for the Approximation of Multiplierless Constant Matrix Vector Multiplication.Levent Aksoy, Paulo F. Flores, Jos Monteiro
2015ISCASApproximation of multiple constant multiplications using minimum look-up tables on FPGA.Levent Aksoy, Paulo F. Flores, Jos Monteiro
2014DATEOptimization of design complexity in time-multiplexed constant multiplications.Levent Aksoy, Paulo F. Flores, Jos Monteiro
2014ICCDEfficient design of FIR filters using hybrid multiple constant multiplications on FPGA.Levent Aksoy, Paulo F. Flores, Jos Monteiro
2014ISCASECHO: A novel method for the multiplierless design of constant array vector multiplication.Levent Aksoy, Paulo F. Flores, Jos Monteiro
2012DATEDesign of low-complexity digital finite impulse response filters on FPGAs.Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos Monteiro
2012ICCADMultiple tunable constant multiplications: Algorithms and applications.Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos Monteiro
2011ISCASOptimization of area in digit-serial Multiple Constant Multiplications at gate-level.Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, Jos Monteiro
2010DSDOptimization of Area and Delay at Gate-Level in Multiple Constant Multiplications.Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos Monteiro
2007DACOptimization of Area in Digital FIR Filters using Gate-Level Metrics.Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, Jos Monteiro
2006DACOptimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming.Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, Jos Monteiro