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Lorenzo Ciampolini

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

4

Venues

4

Active years

2013–2026

Best venue rank

National

Where they publish

Papers

4 indexed papers, newest first.

YearVenueTitleAuthors
2026VTSEnhancing Testability & Security of Near-Memory Computing Architectures.Hichem Benamara, Sabrina Ait Belkacem, Maria Ramirez-Corrales, Lorenzo Ciampolini, Jean-Philippe Noel, Maha Kooli, Lila Ammoura, Ian O'Connor, Patrick Girard, Arnaud Virazel
2021DATEStorage Class Memory with Computing Row Buffer: A Design Space Exploration.Valentin Egloff, Jean-Philippe Noel, Maha Kooli, Bastien Giraud, Lorenzo Ciampolini, Roman Gauchi, Csar Fuguet Tortolero, Eric Guthmuller, Mathieu Moreau, Jean-Michel Portal
2016ICCADEfficient yield estimation through generalized importance sampling with application to NBL-assisted SRAM bitcells.Lorenzo Ciampolini, Jean-Christophe Lafont, Faress Tissafi Drissi, Jean-Paul Morin, David Turgis, Xavier Jonsson, Cyril Desclves, Joseph Nguyen
2013ISCASMultiple-pulse dynamic stability and failure analysis of low-voltage 6T-SRAM bitcells in 28nm UTBB-FDSOI.Kaya Can Akyel, Lorenzo Ciampolini, Olivier Thomas, Bertrand Pelloux-Prayer, Shishir Kumar, Philippe Flatresse, Christophe Lecocq, Grard Ghibaudo