Loris Mendola
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2023–2023
Best venue rank
A
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2023 | DATE | Using High-Level Synthesis to model System Verilog procedural timing controls. | Luca Ezio Pozzoni, Fabrizio Ferrandi, Loris Mendola, Alfio Antonino Palazzo, Francesco Pappalardo |