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Luigi Raffo

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

20

Venues

9

Active years

1997–2025

Best venue rank

A*

Where they publish

Papers

20 indexed papers, newest first.

YearVenueTitleAuthors
2025DATEEnabling SNN-Based Near-MEA Neural Decoding with Channel Selection: An Open-HW Approach.Gianluca Leone, Luca Martis, Luigi Raffo, Paolo Meloni
2017DATECross-layer design of reconfigurable cyber-physical systems.Michael Masin, Francesca Palumbo, Hans Myrhaug, J. A. de Oliveira Filho, M. Pastena, Maxime Pelcat, Luigi Raffo, Francesco Regazzoni, A. A. Sanchez, Antonella Toffetti, Eduardo de la Torre, Katiuscia Zedda
2014ISCAA Stream Buffer Mechanism for Pervasive Splitting Transformations on Polyhedral Process Networks.Paolo Meloni, Giuseppe Tuveri, Luigi Raffo, Igor Loi, Francesco Conti
2012DATEExploiting binary translation for fast ASIP design space exploration on FPGAs.Sebastiano Pomata, Paolo Meloni, Giuseppe Tuveri, Luigi Raffo, Menno Lindwer
2012DSDASAM: Automatic Architecture Synthesis and Application Mapping.Lech Jzwiak, Menno Lindwer, Rosilde Corvino, Paolo Meloni, Laura Micconi, Jan Madsen, Erkan Diken, Deepak Gangadharan, Roel Jordans, Sebastiano Pomata, Paul Pop, Giuseppe Tuveri, Luigi Raffo
2012DSDSystem Adaptivity and Fault-Tolerance in NoC-based MPSoCs: The MADNESS Project Approach.Paolo Meloni, Giuseppe Tuveri, Luigi Raffo, Emanuele Cannella, Todor P. Stefanov, Onur Derin, Leandro Fiorin, Mariagiovanna Sami
2012ISCASMulti-purpose systems: A novel dataflow-based generation and mapping strategy.Jean-Franois Nezan, Nicolas Siret, Matthieu Wipliez, Francesca Palumbo, Luigi Raffo
2010ISPASSExploiting FPGAs for technology-aware system-level evaluation of multi-core architectures.Simone Secchi, Paolo Meloni, Luigi Raffo
2008DSDA Network on Chip Architecture for Heterogeneous Traffic Support with Non-Exclusive Dual-Mode Switching.Simone Secchi, Francesca Palumbo, Danilo Pani, Luigi Raffo
2007DSDOn the impact of serialization on the cache performances in Network-on-Chip based MPSoCs.Paolo Meloni, Giovanni Busonera, Salvatore Carta, Luigi Raffo
2006DATEContrasting a NoC and a traditional interconnect fabric with layout awareness.Federico Angiolini, Paolo Meloni, Salvatore Carta, Luca Benini, Luigi Raffo
2006DSDAutomatic Application Partitioning on FPGA/CPU Systems Based on Detailed Low-Level Information.Giovanni Busonera, Salvatore Carta, Andrea Marongiu, Luigi Raffo
2006ICCADDesigning application-specific networks on chips with floorplan information.Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
2005DATExpipes Lite: A Synthesis Oriented Design Library For Networks on Chips.Stergios Stergiou, Federico Angiolini, Salvatore Carta, Luigi Raffo, Davide Bertozzi, Giovanni De Micheli
2005DSDRun-time Adaptive Resources Allocation and Balancing on Nanoprocessors Arrays.Danilo Pani, Giuseppe Passino, Luigi Raffo
2004PPSNA Swarm Intelligence Based VLSI Multiplication-and-Add Scheme.Danilo Pani, Luigi Raffo
2000ISCASBlock-matching evaluation in digital architectures for motion estimation.Luigi Raffo, Maria Paola Zizola
2000ISLPEDA micro-power mixed signal IC for battery-operated burglar alarm systems.Silvio Bolliri, Paolo Porcu, Luigi Raffo
1999ISCASA modular digital VLSI architecture for stereo depth estimation in industrial applications.Andrea Alimonda, Salvatore Carta, Luigi Raffo
1997ICANNAn Analog VLSI Computational Engine for Early Vision Tasks.Giacomo M. Bisio, Gian Marco Bo, M. Confalone, Luigi Raffo, Silvio P. Sabatini, M. P. Zizola