| 2016 | ICRA | Sperm-shaped magnetic microrobots: Fabrication using electrospinning, modeling, and characterization. | Islam S. M. Khalil, Ahmet Fatih Tabak, Abdelrahman Hosney, Abdallah Mohamed, Anke Klingner, Maged Ghoneima, Metin Sitti |
| 2016 | ISCAS | A fast locking hybrid TDC-BB ADPLL utilizing proportional derivative digital loop filter and power gated DCO. | Amr Lotfy, Maged Ghoneima, Mohamed Abdel-Moneum |
| 2015 | ISCAS | New polynomial basis versatile multiplier over GF(2 | Mustafa Khairallah, Maged Ghoneima |
| 2015 | ISCAS | 2T2M memristor-based memory cell for higher stability RRAM modules. | Noha Shaarawy, Maged Ghoneima, Ahmed G. Radwan |
| 2014 | ISCAS | Low-power all-digital manchester-encoding-based high-speed serdes transceiver for on-chip networks. | Abdelrahman H. Elsayed, Ramy N. Tadros, Maged Ghoneima, Yehea I. Ismail |
| 2014 | ISCAS | A variation tolerant driving technique for all-digital self-timed 3-level signaling high-speed SerDes transceivers for on-chip networks. | Ramy N. Tadros, Abdelrahman H. Elsayed, Maged Ghoneima, Yehea I. Ismail |
| 2012 | ISCAS | A 16Gbps low power self-timed SerDes transceiver for multi-core communication. | Ezz El-Din O. Hussein, Sally Safwat, Maged Ghoneima, Yehea I. Ismail |
| 2012 | ISCAS | A 0.8V 6.4W compact mixed-signal front-end for neural implants. | Ahmed El Kholy, Maged Ghoneima, Khaled Sharaf |
| 2012 | ISCAS | A 5-10GHz low power bang-bang all digital PLL based on programmable digital loop filter. | Sally Safwat, Amr Lotfy, Maged Ghoneima, Yehea I. Ismail |
| 2011 | ISCAS | A dynamic calibration scheme for on-chip process and temperature variations. | Mina Raymond, Maged Ghoneima, Yehea I. Ismail |
| 2011 | ISCAS | A 12Gbps all digital low power SerDes transceiver for on-chip networking. | Sally Safwat, Ezz El-Din O. Hussein, Maged Ghoneima, Yehea I. Ismail |
| 2006 | ISCAS | Reducing the data switching activity of serialized datastreams. | Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek De |
| 2006 | ISLPED | Time-borrowing multi-cycle on-chip interconnects for delay variation tolerance. | Keith A. Bowman, James W. Tschanz, Muhammad M. Khellah, Maged Ghoneima, Yehea I. Ismail, Vivek De |
| 2005 | ICCAD | Serial-link bus: a low-power on-chip bus architecture. | Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, James W. Tschanz, Vivek De |
| 2005 | ICCD | A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors. | Muhammad M. Khellah, Maged Ghoneima, James W. Tschanz, Yibin Ye, Nasser A. Kurd, Javed Barkatullah, Srikanth Nimmagadda, Yehea I. Ismail |
| 2005 | ISCAS | Accurate decoupling of capacitively coupled buses. | Maged Ghoneima, Yehea I. Ismail |
| 2005 | ISCAS | Skewing adjacent line repeaters to reduce the delay and energy dissipation of on-chip buses. | Yehea I. Ismail, Muhammad M. Khellah, Maged Ghoneima, James W. Tschanz, Yibin Ye, Vivek De |
| 2004 | ICCAD | Formal derivation of optimal active shielding for low-power on-chip buses. | Maged Ghoneima, Yehea I. Ismail |
| 2004 | ISCAS | Low power coupling-based encoding for on-chip buses. | Maged Ghoneima, Yehea I. Ismail |
| 2004 | ISCAS | Effect of relative delay on the dissipated energy in coupled interconnects. | Maged Ghoneima, Yehea I. Ismail |
| 2004 | ISLPED | Delayed line bus scheme: a low-power bus scheme for coupled on-chip buses. | Maged Ghoneima, Yehea I. Ismail |
| 2003 | DAC | Optimum positioning of interleaved repeaters In bidirectional buses. | Maged Ghoneima, Yehea I. Ismail |