Magesh Sadasivam
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2004–2004
Best venue rank
A
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2004 | FPGA | Dynamically reconfigurable architecture for high-throughput processing of data centric applications. | Magesh Sadasivam, Sangjin Hong |
| 2004 | ISCAS | Glitching power reduction through supply voltage adaptation mechanism for low power array structure design. | Sangjin Hong, Shu-Shin Chin, Magesh Sadasivam |