Manuel Valencia-Barrero
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
2
Active years
1993–2020
Best venue rank
C
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2020 | ISCAS | Hamming-Code Based Fault Detection Design Methodology for Block Ciphers. | Francisco Eugenio Potestad-Ordez, Erica Tena-Snchez, Ricardo Chaves, Manuel Valencia-Barrero, Antonio Acosta-Jimnez, Carlos Jess Jimnez-Fernndez |
| 2016 | ISCAS | Fault attack on FPGA implementations of Trivium stream cipher. | Francisco Eugenio Potestad-Ordez, Carlos Jess Jimnez-Fernndez, Manuel Valencia-Barrero |
| 2007 | ISCAS | Asymmetric clock driver for improved power and noise performances. | Javier Castro-Ramirez, Pilar Parra Fernndez, Manuel Valencia-Barrero, Antonio J. Acosta |
| 2001 | DATE | HALOTIS: high accuracy LOgic TIming simulator with inertial and degradation delay model. | Paulino Ruiz-de-Clavijo, Jorge Juan-Chico, Manuel J. Bellido, Antonio J. Acosta, Manuel Valencia-Barrero |
| 2001 | ISCAS | Gate-level simulation of CMOS circuits using the IDDM model. | Manuel J. Bellido, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, Antonio J. Acosta, Manuel Valencia-Barrero |
| 1993 | ISCAS | A New Faster Method for Calculating the Resolution Coefficient of CMOS Latches: Design of an Optimum Latch. | Manuel J. Bellido, Manuel Valencia-Barrero, Antonio J. Acosta, Angel Barriga, Jos Luis Huertas, Rafael Domnguez-Castro |