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Mara C. Molina

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

19

Venues

7

Active years

2002–2013

Best venue rank

A*

Where they publish

Papers

19 indexed papers, newest first.

YearVenueTitleAuthors
2013DATEMultispeculative additive trees in high-level synthesis.Alberto A. Del Barrio, Romn Hermida, Seda Ogrenci Memik, Jose Manuel Mendias, Mara C. Molina
2011DATEPower optimization in heterogenous datapaths.Alberto A. Del Barrio, Seda Ogrenci Memik, Mara C. Molina, Jos M. Mendas, Romn Hermida
2010DATEUsing Speculative Functional Units in high level synthesis.Alberto A. Del Barrio, Mara C. Molina, Jose Manuel Mendias, Romn Hermida, Seda Ogrenci Memik
2009FPLEnhanced gradient-based motion vector coprocessor.Guillermo Botella Juan, Antonio Garca Ros, Uwe Meyer-Bse, Manuel Rodrguez, Mara C. Molina, Lus Parrilla Roure
2008DSDRestricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis.Alberto A. Del Barrio, Mara C. Molina, Jose Manuel Mendias, Esther Andres Perez, Romn Hermida
2008DSDExploiting Internal Operation Patterns during the High-Level Synthesis of Time-Constrained Circuits.Pedro Garcia-Repetto, Mara C. Molina, Rafael Ruiz-Sautua, Guillermo Botella Juan
2008ICCDApplying speculation techniques to implement functional units.Alberto A. Del Barrio, Mara C. Molina, Jose Manuel Mendias, Esther Andres Perez, Romn Hermida, Francisco Tirado
2007DATEArea optimization of multi-cycle operators in high-level synthesis.Mara C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Romn Hermida
2006DATEPre-synthesis optimization of multiplications to improve circuit performance.Rafael Ruiz-Sautua, Mara C. Molina, Jos M. Mendas, Romn Hermida
2005ASPDACArrival time aware scheduling to minimize clock cycle length.Rafael Ruiz-Sautua, Mara C. Molina, Jos M. Mendas, Romn Hermida
2005DATEBehavioural Transformation to Improve Circuit Performance in High-Level Synthesis.Rafael Ruiz-Sautua, Mara C. Molina, Jos M. Mendas, Romn Hermida
2005ICCADPerformance-driven read-after-write dependencies softening in high-level synthesis.Rafael Ruiz-Sautua, Mara C. Molina, Jose Manuel Mendias, Romn Hermida
2004DATEBehavioural Bitwise Scheduling Based on Computational Effort Balancing.Mara C. Molina, Rafael Ruiz-Sautua, Jos M. Mendas, Romn Hermida
2003DATEHigh-Level Allocation to Minimize Internal Hardware Wastage.Mara C. Molina, Jos M. Mendas, Romn Hermida
2002DACHigh-level synthesis of multiple-precision circuitsindependent of data-objects length.Mara C. Molina, Jos M. Mendas, Romn Hermida
2002DATEMultiple-Precision Circuits Allocation Independent of Data-Objects Length.Mara C. Molina, Jos M. Mendas, Romn Hermida
2002DSDEfficient Verification of Scheduling, Allocation and Binding in High-Level Synthesis.Jos M. Mendas, Romn Hermida, Mara C. Molina, Olga Pealba
2002DSDBit-Level Allocation of Multiple-Precision Specifications.Mara C. Molina, Jos M. Mendas, Romn Hermida
2002ICCADBit-level scheduling of heterogeneous behavioural specifications.Mara C. Molina, Jos M. Mendas, Romn Hermida