Mario R. Casu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
19
Venues
6
Active years
2001–2026
Best venue rank
A*
Where they publish
Papers
19 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | DATE | Design for testability using mixed-polarity flip-flops and latches. | Lorenzo Lagostina, Jordi Cortadella, Mario R. Casu, Luciano Lavagno |
| 2024 | DATE | STAR: Sum-Together/Apart Reconfigurable Multipliers for Precision-Scalable ML Workloads. | Edward Manca, Luca Urbinati, Mario R. Casu |
| 2024 | FIE | WIP: Building an Education Ecosystem for Next Generation Microelectronics Experts in Green and Circular Economy with Digitally-Supported Teaching Methods for Sustainable Chips and Applications (EU Project GreenChips-EDU). | Klaus Hofmann, Ferdinand Keil, David Riehl, Alicja Michalowska-Forsyth, Nikolaus Czepl, Sarah Woywod, Dominik Zupan, Mario R. Casu, Carlo Ricciardi, Massimo Violante, Mariagrazia Graziano, Yuri Ardesi, Fabrizio Mo, Dominik Berger, Sabine Sill, Volker Visotschnig, Panagiota Morfouli, Liliana Prejbeanu, Katell Morin-Allory, Cyrille Chavet, Davide Bucci, Skandar Basrour, Jean-Christophe Crebier, Nhu-Huan Nguyen, Ernesto Quisbert-Trujillo, Christian Deflix, Isabelle Corbett-Etchevers, Johannes Sturm, Jens Peter Konrath, Ulla Birnbacher, Thomas Klinger, Wolfgang Werth, Jorge Fernandes, Marcelino B. Santos, Antonio Rubio, Alba Pags-Zamora, Josep Pegueroles, Jordi Salazar, Beatriz Otero, J. Manuel Moreno, X. Aragones, Israel Martin, Aleix Sole, Dunja Suttnig, Julia Calabro, Floriberto Lima, Eric Jouseau, Franois Cerisier, Cristian Rivier, Sepp Eisenriegler, Harald Reichl, Miroslav Macan, Dubravko Kruselj, Mladen Puskaric, Mirjana Tatalovic, Vinko Zelenicic, Bernd Deutschmann |
| 2022 | ISCAS | HLS-based dataflow hardware architecture for Support Vector Machine in FPGA. | Mohammad Amir Mansoori, Mario R. Casu |
| 2022 | ISCAS | A Reconfigurable Depth-Wise Convolution Module for Heterogeneously Quantized DNNs. | Luca Urbinati, Mario R. Casu |
| 2020 | ISCAS | A Machine-Learning Based Microwave Sensing Approach to Food Contaminant Detection. | Luca Urbinati, Marco Ricci, Giovanna Turvani, Jorge A. Tobon Vasquez, Francesca Vipiana, Mario R. Casu |
| 2019 | DAC | Exact and Heuristic Allocation of Multi-kernel Applications to Multi-FPGA Platforms. | Junnan Shan, Mario R. Casu, Jordi Cortadella, Luciano Lavagno, Mihai T. Lazarescu |
| 2018 | DATE | Energy-performance design exploration of a low-power microprogrammed deep-learning accelerator. | Giulia Santoro, Mario R. Casu, Valentino Peluso, Andrea Calimera, Massimo Alioto |
| 2018 | ISCAS | Design-Space Exploration of Pareto-Optimal Architectures for Deep Learning with DVFS. | Giulia Santoro, Mario R. Casu, Valentino Peluso, Andrea Calimera, Massimo Alioto |
| 2015 | DATE | Rate-based vs delay-based control for DVFS in NoC. | Mario R. Casu, Paolo Giaccone |
| 2015 | ICCD | Acceleration of microwave imaging algorithms for breast cancer detection via High-Level Synthesis. | Daniele Jahier Pagliari, Mario R. Casu, Luca P. Carloni |
| 2010 | DATE | A flexible UWB Transmitter for breast cancer detection imaging systems. | Massimo Cutrupi, Marco Crepaldi, Mario R. Casu, Mariagrazia Graziano |
| 2010 | DATE | MEDEA: a hybrid shared-memory/message-passing multiprocessor NoC-based architecture. | Sergio Tota, Mario R. Casu, Massimo Ruo Roch, Luca Rostagno, Maurizio Zamboni |
| 2007 | DATE | An effective AMS top-down methodology applied to the design of a mixed-signal UWB system-on-chip. | Marco Crepaldi, Mario R. Casu, Mariagrazia Graziano, Maurizio Zamboni |
| 2005 | DATE | A New System Design Methodology for Wire Pipelined SoC. | Mario R. Casu, Luca Macchiarulo |
| 2004 | DAC | A new approach to latency insensitive design. | Mario R. Casu, Luca Macchiarulo |
| 2004 | DATE | Issues in Implementing Latency Insensitive Protocols. | Mario R. Casu, Luca Macchiarulo |
| 2004 | ICCD | On-Chip Transparent Wire Pipelining. | Mario R. Casu, Luca Macchiarulo |
| 2001 | ISLPED | Synthesis of low-leakage PD-SOI circuits with body-biasing. | Mario R. Casu, Gianluca Piccinini, Guido Masera, Maurizio Zamboni |