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Martin Saint-Laurent

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

4

Venues

2

Active years

2001–2015

Best venue rank

C

Where they publish

Papers

4 indexed papers, newest first.

YearVenueTitleAuthors
2015ICCDPower-aware multi-voltage custom memory models for enhancing RTL and low power verification.Vijay Kiran Kalyanam, Martin Saint-Laurent, Jacob A. Abraham
2010ISLPEDA low-power clock gating cell optimized for low-voltage operation in a 45-nm technology.Martin Saint-Laurent, Animesh Datta
2007ISLPEDA 65-nm pulsed latch with a single clocked transistor.Martin Saint-Laurent, Baker Mohammad, Paul Bassett
2001ICCDOn The Micro-architectural Impact of Clock Distribution Using Multiple PLLs.Martin Saint-Laurent, Madhavan Swaminathan, James D. Meindl