Masaharu Terada
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
2011–2013
Best venue rank
B
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | ASPDAC | A 40-nm 0.5-V 12.9-pJ/Access 8T SRAM using low-power disturb mitigation technique. | Shusuke Yoshimoto, Masaharu Terada, Shunsuke Okumura, Toshikazu Suzuki, Shinji Miyano, Hiroshi Kawaguchi, Masahiko Yoshimoto |
| 2012 | ISLPED | A 40-nm 256-Kb Sub-10 pJ/Access 8t SRAM with read bitline amplitude limiting (RBAL) scheme. | Shusuke Yoshimoto, Masaharu Terada, Youhei Umeki, Shunsuke Okumura, Atsushi Kawasumi, Toshikazu Suzuki, Shinichi Moriwaki, Shinji Miyano, Hiroshi Kawaguchi, Masahiko Yoshimoto |
| 2011 | SIGUCCS | Information and communication technology infrastructure and management for collaboration with regional universities and colleges. | Takashi Yamanoue, Robert J. Fouser, Tomohito Wada, Masayasu Hidaka, Yusei Suzuki, Masaharu Terada, Akira Takenoshita, Yutoku Beppu, Yoko Nedachi, Koji Yukawa, Holmes Rodriguez, Katsuyuki Suenaga, Yuichi Yamanaka, Toshihiko Okamura, Anne Elizabeth Brasier, Hiroyuki Seto, Kazuhide Dogome, Takeshi Yamada, Noritaka Oto, Masakazu Ito, Munetomo Nedachi |