Masakazu Yamashina
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
1997–2000
Best venue rank
B
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2000 | ASPDAC | Reconfigurable computing: its concept and a practical embodiment using newly developed dynamically reconfigurable logic (DRL) LSI: invited talk. | Masakazu Yamashina, Masato Motomura |
| 1998 | FCCM | An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration. | Masato Motomura, Yoshiharu Aimoto, Atsufkni Shibayama, Yoshikazu Yabe, Masakazu Yamashina |
| 1997 | ICASSP | An MPEG-2 encoder architecture based on a single-chip dedicated LSI with a control MPU. | Yasushi Ooi, Osamu Ohnishi, Yutaka Yokoyama, Yoichi Katayama, Masayuki Mizuno, Masakazu Yamashina, Hideo Takano, Naoya Hayashi, Ichiro Tamitani |