Masaru Kato
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2008–2010
Best venue rank
B
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2010 | ASPDAC | MuCCRA-3: a low power dynamically reconfigurable processor array. | Yoshiki Saito, Toru Sano, Masaru Kato, Vasutan Tunbunheng, Yoshihiro Yasuda, Masayuki Kimura, Hideharu Amano |
| 2009 | FPL | Fine Grain Partial Reconfiguration for energy saving in Dynamically Reconfigurable Processors. | Toru Sano, Yoshiki Saito, Masaru Kato, Hideharu Amano |
| 2008 | FPL | Instruction buffer mode for multi-context Dynamically Reconfigurable Processors. | Toru Sano, Masaru Kato, Satoshi Tsutsumi, Yohei Hasegawa, Hideharu Amano |