| 2020 | IOLTS | A Low Capture Power Oriented X-Identification-Filling Co-Optimization Method. | Toshinori Hosokawa, Kenichiro Misawa, Hiroshi Yamazaki, Masayoshi Yoshimura, Masayuki Arai |
| 2019 | IOLTS | An Efficient SAT-Attack Algorithm Against Logic Encryption. | Yusuke Matsunaga, Masayoshi Yoshimura |
| 2019 | IOLTS | A Controller Augmentation Method to Improve Transition Fault Coverage for RTL Data-Paths. | Yuki Takeuchi, Toshinori Hosokawa, Hiroshi Yamazaki, Masayoshi Yoshimura |
| 2018 | IOLTS | A Sequentially Untestable Fault Identification Method Based on n-Bit State Cube Justification. | Toshinori Hosokawa, Morito Niseki, Masayoshi Yoshimura, Hiroshi Yamazaki, Masayuki Arai, Hiroyuki Yotsuyanagi, Masaki Hashizume |
| 2018 | IOLTS | A Test Register Assignment Method Based on Controller Augmentation to Reduce the Number of Test Patterns. | Toshinori Hosokawa, Hiroshi Yamazaki, Shun Takeda, Masayoshi Yoshimura |
| 2018 | IOLTS | A Capture Safe Static Test Compaction Method Based on Don't Cares. | Sayuri Ochi, Hiroshi Yamazaki, Toshinori Hosokawa, Masayoshi Yoshimura |
| 2017 | IOLTS | Controller augmentation and test point insertion at RTL for concurrent operational unit testing. | Toshinori Hosokawa, Shun Takeda, Hiroshi Yamazaki, Masayoshi Yoshimura |
| 2017 | PRDC | A Hardware Trojan Circuit Detection Method Using Activation Sequence Generations. | Masayoshi Yoshimura, Tomohiro Bouyashiki, Toshinori Hosokawa |
| 2013 | DDECS | A don't care identification method for test compaction. | Hiroshi Yamazaki, Motohiro Wakazono, Toshinori Hosokawa, Masayoshi Yoshimura |
| 2012 | IOLTS | Neutron-induced soft error rate estimation for SRAM using PHITS. | Shusuke Yoshimoto, Takuro Amashita, Masayoshi Yoshimura, Yusuke Matsunaga, Hiroto Yasuura, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto |
| 2011 | IOLTS | Multiple-bit-upset and single-bit-upset resilient 8T SRAM bitcell layout with divided wordline structure. | Shusuke Yoshimoto, Takuro Amashita, D. Kozuwa, Taiga Takata, Masayoshi Yoshimura, Yusuke Matsunaga, Hiroto Yasuura, Hiroshi Kawaguchi, Masahiko Yoshimoto |
| 2010 | DDECS | Evaluation of transition untestable faults using a multi-cycle capture test generation method. | Masayoshi Yoshimura, Hiroshi Ogawa, Toshinori Hosokawa, Koji Yamazaki |
| 2004 | BIBE | SemanticObjects and Biomedical Informatics. | Atsushi Kitazawa, Masayoshi Yoshimura |
| 2001 | ASPDAC | Design for testability strategies using full/partial scan designs and test point insertions to reduce test application times. | Toshinori Hosokawa, Masayoshi Yoshimura, Mitsuyasu Ohta |