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Masayuki Hiromoto

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

21

Venues

10

Active years

2007–2023

Best venue rank

A*

Where they publish

Papers

21 indexed papers, newest first.

YearVenueTitleAuthors
2023WACVImproving Predicate Representation in Scene Graph Generation by Self-Supervised Learning.So Hasegawa, Masayuki Hiromoto, Akira Nakagawa, Yuhei Umeda
2020CVPRENSEI: Efficient Secure Inference via Frequency-Domain Homomorphic Convolution for Privacy-Preserving Visual Recognition.Song Bian, Tianchen Wang, Masayuki Hiromoto, Yiyu Shi, Takashi Sato
2019ASPDACTowards practical homomorphic email filtering: a hardware-accelerated secure nave bayesian filter.Song Bian, Masayuki Hiromoto, Takashi Sato
2019DACFilianore: Better Multiplier Architectures for LWE-based Post-Quantum Key Exchange.Song Bian, Masayuki Hiromoto, Takashi Sato
2019DATEDArL: Dynamic Parameter Adjustment for LWE-based Secure Inference.Song Bian, Masayuki Hiromoto, Takashi Sato
2018ASPDACEfficient worst-case timing analysis of critical-path delay under workload-dependent aging degradation.Shumpei Morita, Song Bian, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato
2018CVPRInterpolation-Based Object Detection Using Motion Vectors for Embedded Real-Time Tracking Systems.Takayuki Ujiie, Masayuki Hiromoto, Takashi Sato
2018DACDWE: decrypting learning with errors with errors.Song Bian, Masayuki Hiromoto, Takashi Sato
2018ICCADEnhancing the solution quality of hardware ising-model solver via parallel tempering.Hidenori Gyoten, Masayuki Hiromoto, Takashi Sato
2017ASPDACEfficient circuit failure probability calculation along product lifetime considering device aging.Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2017DACLSTA: Learning-Based Static Timing Analysis for High-Dimensional Correlated On-Chip Variations.Song Bian, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato
2017DATESCAM: Secured content addressable memory based on homomorphic encryption.Song Bian, Masayuki Hiromoto, Takashi Sato
2016CVPRApproximated Prediction Strategy for Reducing Power Consumption of Convolutional Neural Network Processor.Takayuki Ujiie, Masayuki Hiromoto, Takashi Sato
2016ISCASPhysically unclonable function using RTN-induced delay fluctuation in ring oscillators.Motoki Yoshinaga, Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2015DATEECRIPSE: an efficient method for calculating RTN-induced failure probability of an SRAM cell.Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2013DATEHot-swapping architecture with back-biased testing for mitigation of permanent faults in functional unit array.Zoltn Endre Rkossy, Masayuki Hiromoto, Hiroshi Tsutsui, Takashi Sato, Yukihiro Nakamura, Hiroyuki Ochi
2009FPLCoarse-grained dynamically reconfigurable architecture with flexible reliability.Dawood Alnajiar, Younghun Ko, Takashi Imagawa, Hiroaki Konoura, Masayuki Hiromoto, Yukio Mitsuyama, Masanori Hashimoto, Hiroyuki Ochi, Takao Onoye
2009FPLHot-Swapping architecture extension for mitigation of permanent functional unit faults.Zoltan Endre Rakosi, Masayuki Hiromoto, Hiroyuki Ochi, Yukihiro Nakamura
2009ICVSCascade Classifier Using Divided CoHOG Features for Rapid Pedestrian Detection.Masayuki Hiromoto, Ryusuke Miyamoto
2009WCNCDynamic rate control for media streaming in high-speed mobile networks.Masayuki Hiromoto, Hiroshi Tsutsui, Hiroyuki Ochi, Tomoyuki Osano, Norihiro Ishikawa, Yukihiro Nakamura
2007CVPRA Specialized Processor Suitable for AdaBoost-Based Detection with Haar-like Features.Masayuki Hiromoto, Kentaro Nakahara, Hiroki Sugano, Yukihiro Nakamura, Ryusuke Miyamoto