Matthew M. Ziegler
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
20
Venues
9
Active years
2001–2022
Best venue rank
A*
Where they publish
Papers
20 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2022 | ISCAS | Hyper-parameter Tuning for Progressive Learning and its Application to Network Cyber Security. | Rupesh Raj Karn, Matthew M. Ziegler, Jinwook Jung, Ibrahim Abe M. Elfadel |
| 2021 | ICCAD | Online and Offline Machine Learning for Industrial Design Flow Tuning: (Invited - ICCAD Special Session Paper). | Matthew M. Ziegler, Jihye Kwon, Hung-Yi Liu, Luca P. Carloni |
| 2021 | ISCA | RaPiD: AI Accelerator for Ultra-low Precision Training and Inference. | Swagath Venkataramani, Vijayalakshmi Srinivasan, Wei Wang, Sanchari Sen, Jintao Zhang, Ankur Agrawal, Monodeep Kar, Shubham Jain, Alberto Mannari, Hoang Tran, Yulong Li, Eri Ogawa, Kazuaki Ishizaki, Hiroshi Inoue, Marcel Schaal, Mauricio J. Serrano, Jungwook Choi, Xiao Sun, Naigang Wang, Chia-Yu Chen, Allison Allain, James Bonanno, Nianzheng Cao, Robert Casatuta, Matthew Cohen, Bruce M. Fleischer, Michael Guillorn, Howard Haynie, Jinwook Jung, Mingu Kang, Kyu-Hyoun Kim, Siyu Koswatta, Sae Kyu Lee, Martin Lutz, Silvia M. Mueller, Jinwook Oh, Ashish Ranjan, Zhibin Ren, Scot Rider, Kerstin Schelm, Michael Scheuermann, Joel Silberman, Jie Yang, Vidhi Zalani, Xin Zhang, Ching Zhou, Matthew M. Ziegler, Vinay Shah, Moriyoshi Ohara, Pong-Fei Lu, Brian W. Curran, Sunil Shukla, Leland Chang, Kailash Gopalakrishnan |
| 2019 | DAC | A Learning-Based Recommender System for Autotuning Design Flows of Industrial High-Performance Processors. | Jihye Kwon, Matthew M. Ziegler, Luca P. Carloni |
| 2019 | HPCA | Resilient Low Voltage Accelerators for High Energy Efficiency. | Nandhini Chandramoorthy, Karthik Swaminathan, Martin Cochet, Arun Paidimarri, Schuyler Eldridge, Rajiv V. Joshi, Matthew M. Ziegler, Alper Buyuktosunoglu, Pradip Bose |
| 2018 | ISLPED | Across the Stack Opportunities for Deep Learning Acceleration. | Vijayalakshmi Srinivasan, Bruce M. Fleischer, Sunil Shukla, Matthew M. Ziegler, Joel Silberman, Jinwook Oh, Jungwook Choi, Silvia M. Mueller, Ankur Agrawal, Tina Babinsky, Nianzheng Cao, Chia-Yu Chen, Pierce Chuang, Thomas W. Fox, George Gristede, Michael Guillorn, Howard Haynie, Michael J. Klaiber, Dongsoo Lee, Shih-Hsien Lo, Gary W. Maier, Michael Scheuermann, Swagath Venkataramani, Christos Vezyrtzis, Naigang Wang, Fanchieh Yee, Ching Zhou, Pong-Fei Lu, Brian W. Curran, Leland Chang, Kailash Gopalakrishnan |
| 2017 | ICCD | Very Low Voltage (VLV) Design. | Ramon Bertran, Pradip Bose, David M. Brooks, Jeff Burns, Alper Buyuktosunoglu, Nandhini Chandramoorthy, Eric Cheng, Martin Cochet, Schuyler Eldridge, Daniel J. Friedman, Hans M. Jacobson, Rajiv V. Joshi, Subhasish Mitra, Robert K. Montoye, Arun Paidimarri, Pritish Parida, Kevin Skadron, Mircea Stan, Karthik Swaminathan, Augusto Vega, Swagath Venkataramani, Christos Vezyrtzis, Gu-Yeon Wei, John-David Wellman, Matthew M. Ziegler |
| 2016 | DATE | A synthesis-parameter tuning system for autonomous design-space exploration. | Matthew M. Ziegler, Hung-Yi Liu, George Gristede, Bruce Owens, Ricardo Nigaglioni, Luca P. Carloni |
| 2016 | DATE | A Scalable Black-Box Optimization System for Auto-Tuning VLSI Synthesis Programs. | Matthew M. Ziegler, Hung-Yi Liu, George Gristede, Bruce Owens, Ricardo Nigaglioni, Luca P. Carloni |
| 2016 | ISLPED | Scalable Auto-Tuning of Synthesis Parameters for Optimizing High-Performance Processors. | Matthew M. Ziegler, Hung-Yi Liu, Luca P. Carloni |
| 2016 | VLSID | Early Scenario Pruning for Efficient Design Space Exploration in Physical Synthesis. | Mohd Anwar, Sourav Saha, Matthew M. Ziegler, Lakshmi N. Reddy |
| 2014 | ISLPED | Bridging high performance and low power in processor design. | Ruchir Puri, Mihir R. Choudhury, Haifeng Qian, Matthew M. Ziegler |
| 2013 | ICCAD | LatchPlanner: latch placement algorithm for datapath-oriented high-performance VLSI designs. | Minsik Cho, Hua Xiang, Haoxing Ren, Matthew M. Ziegler, Ruchir Puri |
| 2013 | ISLPED | Power reduction by aggressive synthesis design space exploration. | Matthew M. Ziegler, George Gristede, Victor V. Zyuban |
| 2009 | ISLPED | The opportunity cost of low power design: a case study in circuit tuning. | Matthew M. Ziegler, Victor V. Zyuban, George Gristede, Milena Vratonjic, Joshua Friedrich |
| 2006 | VLSID | Hybrid CMOS/Molecular Electronic Circuits. | Mircea R. Stan, Garrett S. Rose, Matthew M. Ziegler |
| 2004 | DATE | A Unified Design Space for Regular Parallel Prefix Adders. | Matthew M. Ziegler, Mircea R. Stan |
| 2003 | ISCAS | The CMOS/nano interface from a circuits perspective. | Matthew M. Ziegler, Mircea R. Stan |
| 2002 | ICCAD | A Case for CMOS/nano co-design. | Matthew M. Ziegler, Mircea R. Stan |
| 2001 | ISCAS | Optimal logarithmic adder structures with a fanout of two for minimizing the area-delay product. | Matthew M. Ziegler, Mircea Stan |