| 2026 | ASPDAC | ReadyPower: A Reliable, Interpretable, and Handy Architectural Power Model Based on Analytical Framework. | Qijun Zhang, Shang Liu, Yao Lu, Mengming Li, Zhiyao Xie |
| 2026 | ASPLOS | PF-LLM: Large Language Model Hinted Hardware Prefetching. | Ceyu Xu, Xiangfeng Sun, Weihang Li, Chen Bai, Bangyan Wang, Mengming Li, Zhiyao Xie, Yuan Xie |
| 2026 | ISCA | ICP: Exploiting Instruction Correlation for Prefetching Irregular Memory Accesses. | Mengming Li, Chenlu Miao, Buqing Xu, Qijun Zhang, Xiangfeng Sun, Ceyu Xu, Yuan Xie, Wenkai Li, Shang Liu, Zhiyao Xie |
| 2025 | ASPDAC | AssertLLM: Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs. | Zhiyuan Yan, Wenji Fang, Mengming Li, Min Li, Shang Liu, Zhiyao Xie, Hongce Zhang |
| 2025 | ASPDAC | FirePower: Towards a Foundation with Generalizable Knowledge for Architecture-Level Power Modeling. | Qijun Zhang, Mengming Li, Yao Lu, Zhiyao Xie |
| 2025 | DAC | AutoPower: Automated Few-Shot Architecture-Level Power Modeling by Power Group Decoupling. | Qijun Zhang, Yao Lu, Mengming Li, Zhiyao Xie |
| 2025 | HPCA | Integrating Prefetcher Selection with Dynamic Request Allocation Improves Prefetching Efficiency. | Mengming Li, Qijun Zhang, Yongqing Ren, Zhiyao Xie |
| 2025 | ISCA | Profile-Guided Temporal Prefetching. | Mengming Li, Qijun Zhang, Yichuan Gao, Wenji Fang, Yao Lu, Yongqing Ren, Zhiyao Xie |
| 2024 | ICCAD | OpenLLM-RTL: Open Dataset and Benchmark for LLM-Aided Design RTL Generation. | Shang Liu, Yao Lu, Wenji Fang, Mengming Li, Zhiyao Xie |
| 2022 | HPCA | unXpec: Breaking Undo-based Safe Speculation. | Mengming Li, Chenlu Miao, Yilong Yang, Kai Bu |
| 2022 | MICRO | SwiftDir: Secure Cache Coherence without Overprotection. | Chenlu Miao, Kai Bu, Mengming Li, Shaowu Mao, Jianwei Jia |