| 2004 | ICCD | Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning. | Ingmar Neumann, Dominik Stoffel, Kolja Sulimma, Michel R. C. M. Berkelaar, Wolfgang Kunz |
| 2002 | DATE | Efficient and Effective Redundancy Removal for Million-Gate Circuits. | Michel R. C. M. Berkelaar, Koen van Eijk |
| 2000 | DATE | Gate Sizing Using a Statistical Delay Model. | E. T. A. F. Jacobs, Michel R. C. M. Berkelaar |
| 1998 | DATE | An Efficient Divide and Conquer Algorithm for Exact Hazard Free Logic Minimization. | J. W. J. M. Rutten, Michel R. C. M. Berkelaar, C. A. J. van Eijk, M. A. J. Kolsteren |
| 1998 | ICCD | Efficient exact and heuristic minimization of hazard-free logic. | J. W. J. M. Rutten, Michel R. C. M. Berkelaar |
| 1996 | ICCAD | Polarized observability don't cares. | Harm Arts, Michel R. C. M. Berkelaar, C. A. J. van Eijk |
| 1995 | ICCAD | Efficient use of large don't cares in high-level and logic synthesis. | Reinaldo A. Bergamaschi, Daniel Brand, Leon Stok, Michel R. C. M. Berkelaar, Shiv Prakash |
| 1995 | ICCAD | Efficient orthonormality testing for synthesis with pass-transistor selectors. | Michel R. C. M. Berkelaar, Lukas P. P. P. van Ginneken |
| 1994 | ICCAD | Computing the entire active area/power consumption versus delay trade-off curve for gate sizing with a piecewise linear simulator. | Michel R. C. M. Berkelaar, Pim H. W. Buurman, Jochen A. G. Jess |
| 1988 | ICCAD | Technology mapping for standard-cell generators. | Michel R. C. M. Berkelaar, Jochen A. G. Jess |