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Mindaugas Drazdziulis

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

2

Active years

2004–2007

Best venue rank

C

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2007DSDHigh-Accuracy Architecture-Level Power Estimation for Partitioned SRAM Arrays in a 65-nm CMOS BPTM Process.Minh Quang Do, Per Larsson-Edefors, Mindaugas Drazdziulis
2005ISCASA low-leakage twin-precision multiplier using reconfigurable power gating.Magnus Sjlander, Mindaugas Drazdziulis, Per Larsson-Edefors, Henrik Eriksson
2004ISCASEvaluation of power cut-off techniques in the presence of gate leakage.Mindaugas Drazdziulis, Per Larsson-Edefors