Ming-Da Chiang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2000–2000
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2000 | ISCAS | The design of a 1.5 V, 10-bit, 10 M samples/s low power pipelined analog-to-digital converter. | Jen-Shiun Chiang, Ming-Da Chiang |