Ming-Yu Tsai
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
2005–2008
Best venue rank
C
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | ISCAS | Area oriented pass-transistor logic synthesis using buffer elimination and layout compaction. | Shen-Fu Hsiao, Ming-Yu Tsai, Chia-Sheng Wen |
| 2005 | ISCAS | An efficient pass-transistor-logic synthesizer using multiplexers and inverters only. | Shen-Fu Hsiao, Ming-Yu Tsai, Ming-Chih Chen, Chia-Sheng Wen |