Minoru Saeki
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
1
Active years
2005–2013
Best venue rank
A
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | CHES | On Measurable Side-Channel Leaks Inside ASIC Design Primitives. | Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki, Mitsuru Shiozaki, Takeshi Fujino |
| 2009 | CHES | A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques. | Minoru Saeki, Daisuke Suzuki, Koichi Shimizu, Akashi Satoh |
| 2006 | CHES | Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style. | Daisuke Suzuki, Minoru Saeki |
| 2005 | CHES | DPA Leakage Models for CMOS Logic Circuits. | Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa |