Miyu Yoshida
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2026–2026
Best venue rank
A
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | FPGA | Improving Area Efficiency in Synthesizable eFPGA with Multi-output Logic Cell and Domain-Specific Routing Architecture. | Ryo Iwasaki, Tatsuya Sasaki, Yumi Iseki, Sota Kohata, Miyu Yoshida, Kenshu Seto, Masahiro Iida |