Mohit Ganeriwala
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2019–2019
Best venue rank
National
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2019 | VLSID | An Unified Charge Centroid Model for Silicon and Low Effective Mass III-V Channel Double Gate MOS Transistors. | Amratansh Gupta, Mohit Ganeriwala, Nihar Ranjan Mohapatra |