| 2010 | CEC | A proposal for Zoning Crossover of Hybrid Genetic Algorithms for large-scale traveling salesman problems. | Masafumi Kuroda, Kunihito Yamamori, Masaharu Munetomo, Moritoshi Yasunaga, Ikuo Yoshihara |
| 2007 | ICONIP | Bio-Inspired Functional Asymmetry Camera System. | Yoshiki Yamaguchi, Noriyuki Aibe, Moritoshi Yasunaga, Yorihisa Yamamoto, Takaaki Awano, Ikuo Yoshihara |
| 2006 | CEC | Enhancement of the Variable-Length-Transmission-Line design method for multi-point optimization. | Naoki Koizumi, Ikuo Yoshihara, Kunihito Yamamori, Moritoshi Yasunaga |
| 2005 | CEC | Variable length segmental-transmission-line and its parameter optimization based on GA. | Naoki Koizumi, Ikuo Yoshihara, Kunihito Yamamori, Moritoshi Yasunaga |
| 2005 | CEC | Finding transcriptional regulatory elements in Dictyostelium gene expression. | Daekwan Seo, Moritoshi Yasunaga, Insook Kim, Byungwoon Ham, Jung Hwan Kim |
| 2004 | CEC | A computational approach to detect regulatory elements in Dictyostelium discoideum. | Daekwan Seo, Moritoshi Yasunaga, Jung Hwan Kim |
| 2003 | CEC | Improved GA-based method for multiple protein sequence alignment. | Hung Dinh Nguyen, Kunihito Yamamori, Ikuo Yoshihara, Moritoshi Yasunaga |
| 2003 | CEC | The design of segmental-transmission-line for high-speed digital signals using genetic algorithms. | Moritoshi Yasunaga, Ikuo Yoshihara, Jung Hwan Kim |
| 2002 | CEC | A parallel hybrid genetic algorithm for multiple protein sequence alignment. | Hung Dinh Nguyen, Ikuo Yoshihara, Kunihito Yamamori, Moritoshi Yasunaga |
| 2002 | CEC | An evolutionary kernel-based reasoning system using reconfigurable VLSIs: its hardware prototyping and application to the splicing boundary problem. | Moritoshi Yasunaga, Kentaro Ushiyama, Noriyuki Aibe, Hidetoshi Fujiwara, Ikuo Yoshiyara, Jung H. Kim |
| 2001 | CEC | Evolvable reasoning hardware: its application to the genome informatics. | Moritoshi Yasunaga, Takahiro Tsuzuku, Kentaro Ushiyama, Ikuo Yoshihara, Jung H. Kim |
| 2000 | CEC | GA-based kernel optimization for pattern recognition: theory for EHW application. | Moritoshi Yasunaga, Taro Nakamura, Ikuo Yoshihara, Jung H. Kim |
| 2000 | CEC | GP-based modeling method for time series prediction with parameter optimization and node alternation. | Ikuo Yoshihara, Tomoo Aoyama, Moritoshi Yasunaga |
| 2000 | FPGA | The application of genetic algorithms to the design of reconfigurable reasoning VLSI chips. | Moritoshi Yasunaga, Jung Hwan Kim, Ikuo Yoshihara |
| 2000 | GECCO | Kernel Optimization in Pattern Recognition Using a Genetic Algorithm. | Moritoshi Yasunaga, Taro Nakamura, Ikuo Yoshihara, Jung Hwan Kim |
| 2000 | GECCO | A Fast Model-Building Method for Time Series Using Genetic Programming. | Ikuo Yoshihara, Tomoo Aoyama, Moritoshi Yasunaga |
| 1999 | IJCNN | Sonar spectrum recognition chip designed by evolutionary algorithm. | Moritoshi Yasunaga, Taro Nakamura, Ikuo Yoshihara |
| 1999 | IJCNN | Parallel self-organization map using multiple stimuli. | Moritoshi Yasunaga, Kenichi Tominaga, Jung Hwan Kim |
| 1999 | IJCNN | Parallel back-propagation using genetic algorithm: real-time BP learning on the massively parallel computer CP-PACS. | Moritoshi Yasunaga, Eiji Yoshida, Ikuo Yoshihara |
| 1999 | IJCNN | A multi-modal neural network using Chebyschev polynomials and its application. | Ikuo Yoshihara, Tomoyuki Nakagawa, Moritoshi Yasunaga, Kenichi Abe |
| 1998 | ICONIP | Dynamic Optical Topography and the Real-Time PDP Chip: An Analytical and Synthetical Approach to Higher-Order Brain Functions. | Hirokazu Koizumi, T. Ochiai, T. Okahashi, Yuichi Yamashita, Atsushi Maki, T. Yamamoto, Y. Inagami, H. Yoshizawa, Masaya Iwata, Takashi Omori, Moritoshi Yasunaga |
| 1998 | KES | Performance of a bus-based parallel computer with integer-representation processors applied to artificial neural network and parallel AI domains. | Moritoshi Yasunaga, Akio Yamada, T. Okahashi |
| 1992 | AAAI | Wafer Scale Integration for Massively Parallel Memory-Based Reasoning. | Hiroaki Kitano, Moritoshi Yasunaga |
| 1990 | IJCNN | Design, fabrication and evaluation of a 5-inch wafer scale neural network LSI composed on 576 digital neurons. | Moritoshi Yasunaga, Noboru Masuda, Masayoshi Yagyu, Mitsuo Asai, Minoru Yamada, Akira Masaki |