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Naresh Sehgal

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

3

Active years

1994–2001

Best venue rank

A*

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2001DACTiming Driven Placement using Physical Net Constraints.Bill Halpin, C. Y. Roger Chen, Naresh Sehgal
1999VLSIDGeneSys: A Leaf-Cell Layout Synthesis System for GHz VLSI Designs.Blent Basaran, Kiran Ganesh, Raymond Y. K. Lau, Artour Levin, Miles McCoo, Srinivasan Rangarajan, Naresh Sehgal
1998ICCADA general approach for regularity extraction in datapath circuits.Amit Chowdhary, Sudhakar Kale, Phani K. Saripella, Naresh Sehgal, Rajesh K. Gupta
1998VLSIDTechnique for Planning of Terminal Locations of Leaf Cells in Cell-Based Design with Routing Considerations.Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal
1994ICCADAn object-oriented cell library manager.Naresh Sehgal, C. Y. Roger Chen, John M. Acken