Naveen Kadayinti
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
2
Active years
2017–2022
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2022 | ISCAS | A True Time Delay Element using Cascaded Variable Bandwidth All Pass Filters. | Mayur S. Marinaik, Ganga K. Maheshwarappa, Naveen Kadayinti |
| 2017 | ISCAS | Settling time of mesochronous clock re-timing circuits in the presence of timing jitter. | Naveen Kadayinti, Amitalok J. Budkuley, Dinesh Kumar Sharma |
| 2017 | VLSID | A Clock Retiming Circuit for Repeaterless Low Swing On-Chip Interconnects. | Naveen Kadayinti, Maryam Shojaei Baghini, Dinesh Kumar Sharma |
| 2017 | VLSID | Clock Skew Measurement Using an All-Digital Sigma-Delta Time to Digital Converter. | Mahadev Govind Shirwaikar, Naveen Kadayinti, Dinesh Kumar Sharma |