| 2014 | ISCAS | A 0.1pJ Freeze Vernier time-to-digital converter in 65nm CMOS. | Kristof Blutman, Jan A. Angevare, Amir Zjajo, Nick van der Meijs |
| 2012 | ASPDAC | Crosstalk-aware statistical interconnect delay calculation. | Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs |
| 2012 | DATE | Transistor-level gate model based statistical timing analysis considering correlations. | Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs |
| 2012 | ISCAS | A 11 W 0°C-160°C temperature sensor in 90 nm CMOS for adaptive thermal monitoring of VLSI circuits. | Amir Zjajo, Nick van der Meijs, Ren van Leuken |
| 2011 | DATE | Fast statistical analysis of RC nets subject to manufacturing variabilities. | Yu Bi, Kees-Jan van der Kolk, Jorge Fernandez Villena, Lus Miguel Silveira, Nick van der Meijs |
| 2011 | DATE | Pseudo circuit model for representing uncertainty in waveforms. | Ashish Nigam, Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs |
| 2010 | DAC | RDE-based transistor-level gate simulation for statistical static timing analysis. | Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs |