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Nihar Ranjan Mohapatra

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

7

Venues

2

Active years

2017–2025

Best venue rank

National

Where they publish

Papers

7 indexed papers, newest first.

YearVenueTitleAuthors
2025VLSIDReliable High-Performance Programmable Voltage Regulator with 0.55A Sink Current for Cryo-Cooler Electronics in 0.18μm HV-CMOS Technology.Nishant Kumar, Hari Shanker Gupta, Nihar Ranjan Mohapatra
2024ISCASA Programmable and Adaptive Dead-Time Controller for Low-Offset Output Generation for Cryo-Cooler Drive Applications.Nishant Kumar, Hari Shanker Gupta, Anuj Srivastava, Nihar Ranjan Mohapatra
2024VLSIDK-means Clustering with ANN based Classification to Predict Current-Voltage Characteristics of Advanced FETs.Om Maheshwari, Dev Vyas, Nihar Ranjan Mohapatra
2020VLSIDThe Design of Ultra Low Power SAR ADC for Implantable Cardioverter Defibrillator (ICD).Satyajit Mohapatra, Nihar Ranjan Mohapatra
2019VLSIDAn Unified Charge Centroid Model for Silicon and Low Effective Mass III-V Channel Double Gate MOS Transistors.Amratansh Gupta, Mohit Ganeriwala, Nihar Ranjan Mohapatra
2019VLSIDA Mismatch Resilient 16-Bit 20 MS/s Pipelined ADC.Satyajit Mohapatra, Hari Shanker Gupta, Nihar Ranjan Mohapatra, Sanjeev Mehta, Arup Roy Chowdhury, Nisha Pandya
2017VLSIDA 64b/66b Line Encoding for High Speed Serializers.Satyajit Mohapatra, Hari Shanker Gupta, Jatindeep Singh, Nihar Ranjan Mohapatra