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Niranjan Kulkarni

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

4

Active years

2009–2017

Best venue rank

A*

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2017DACA Clock Skewing Strategy to Reduce Power and Area of ASIC Circuits.Niranjan Kulkarni, Aykut Dengi, Sarma B. K. Vrudhula
2015ISCASDesign of threshold logic gates using emerging devices.Sarma B. K. Vrudhula, Niranjan Kulkarni, Jinghua Yang
2015ISCASFast and robust differential flipflops and their extension to multi-input threshold gates.Jinghua Yang, Niranjan Kulkarni, Joseph Davis, Sarma B. K. Vrudhula
2012ICCADMinimizing area and power of sequential CMOS circuits using threshold decomposition.Niranjan Kulkarni, Nishant Nukala, Sarma B. K. Vrudhula
2009ICFCAA Novel Approach to Cell Formation.Radim Belohlvek, Niranjan Kulkarni, Vilm Vychodil