Oswaldo Cadenas
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
8
Venues
4
Active years
1999–2013
Best venue rank
B
Where they publish
Papers
8 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | SOFTCOM | Distributed parallelization of greedy Mobile Network Optimization algorithms. | Yuanzhou Ye, Oswaldo Cadenas, Graham M. Megson |
| 2006 | FPL | Verification and FPGA Circuits of a Block-2 Fast Path-Based Predictor. | Oswaldo Cadenas, Graham M. Megson |
| 2005 | DSD | Implementation of a block based neural branch predictor. | Oswaldo Cadenas, Graham M. Megson, Daniel Jones |
| 2002 | DSD | Improving mW/MHz Ratio in FPGAs Pipelined Designs. | Oswaldo Cadenas, Graham M. Megson |
| 2002 | FPL | A Clocking Technique with Power Savings in Virtex-Based Pipelined Designs. | Oswaldo Cadenas, Graham M. Megson |
| 2001 | DSD | Pipelining Considerations for an FPGA Case. | Oswaldo Cadenas, Graham M. Megson |
| 2001 | FPL | A n-Bit Reconfigurable Scalar Quantiser. | Oswaldo Cadenas, Graham M. Megson |
| 1999 | PDPTA | Experiences Using Reconfigurable FPGAs in Implementing Monte-Carlo Methods. | Toomas P. Plaks, Oswaldo Cadenas, Graham M. Megson |