Pablo Viana
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
5
Active years
2003–2014
Best venue rank
A*
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2014 | EUC | Minimum Effort Design Space Subsetting for Configurable Caches. | Mohamad Hammam Alsafrjalani, Ann Gordon-Ross, Pablo Viana |
| 2007 | DATE | A one-shot configurable-cache tuner for improved energy and performance. | Ann Gordon-Ross, Pablo Viana, Frank Vahid, Walid A. Najjar, Edna Barros |
| 2007 | RSP | Cache-Analyzer: Design Space Evaluation of Configurable-Caches in a Single-Pass. | Andr Silva, Guilherme lvaro R. M. Esmeraldo, Edna Barros, Pablo Viana |
| 2006 | DAC | Configurable cache subsetting for fast cache tuning. | Pablo Viana, Ann Gordon-Ross, Eamonn J. Keogh, Edna Barros, Frank Vahid |
| 2006 | SBAC-PAD | Tuning Mechanism for Two-Level Cache Hierarchy Intended for Instruction Caches and Low Energy Consumption. | Abel Guilhermino Silva-Filho, Pablo Viana, Edna Barros, Manoel Eusbio de Lima |
| 2004 | DATE | Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology. | Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo |
| 2003 | SBAC-PAD | Exploring Memory Hierarchy with ArchC. | Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo |