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Pak K. Chan

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

15

Venues

7

Active years

1989–2003

Best venue rank

A*

Where they publish

Papers

15 indexed papers, newest first.

YearVenueTitleAuthors
2003FPGAParallel placement for field-programmable gate arrays.Pak K. Chan, Martine D. F. Schlag
2000FPGANew parallelization and convergence results for NC: a negotiation-based FPGA router.Pak K. Chan, Martine D. F. Schlag
2000ISCASA low-offset class-AB CMOS operational amplifier.Pak K. Chan, Liter Siek, Hwee C. Tay, Jing H. Su
1999FCCMReducing Compilation Time of Zhong's FPGA-Based SAT Solver.Pak K. Chan, Mark J. Boyd, Sezer Gren, K. Klenk, V. Kodavati, R. Kundu, M. Margolese, J. Sun, Katsuharu Suzuki, E. Thorne, X. Wang, J. Xu, M. Zhu
1997FCCMAcceleration of an FPGA router.Pak K. Chan, Martine D. F. Schlag
1997ICCADHybrid spectral/iterative partitioning.Jason Y. Zien, Pak K. Chan, Martine D. F. Schlag
1996ICCADMulti-level spectral hypergraph partitioning with arbitrary vertex sizes.Jason Y. Zien, Martine D. F. Schlag, Pak K. Chan
1995FPGASpectral-Based Multi-Way FPGA Partitioning.Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien
1993DACOn Routability Prediction for Field-Programmable Gate Arrays.Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien
1993DACSpectralPak K. Chan, Martine D. F. Schlag, Jason Y. Zien
1992ICCDRoutability-Driven Techology Mapping for LookUp-Table-Based FPGAs.Martine D. F. Schlag, Jackson Kong, Pak K. Chan
1991ARITHDelay optimization of carry-skip adders and block carry-lookahead adders.Pak K. Chan, Martine D. F. Schlag, Clark D. Thomborson, Vojin G. Oklobdzija
1990DACAlgorithms for Library-Specific Sizing of Combinational Logic.Pak K. Chan
1989ARITHAnalysis and design of CMOS Manchester adders with variable carry-skip.Pak K. Chan, Martine D. F. Schlag
1989DACComputing Signal Delay in General RC Networks by Tree/Link Partitioning.Pak K. Chan, Kevin Karplus