| 2026 | TACAS | MightyPPL: Model Checking MITL with Past and Pnueli Modalities. | Hsi-Ming Ho, Shankara Narayanan Krishna, Khushraj Madnani, Rupak Majumdar, Paritosh K. Pandya |
| 2025 | CONCUR | Expressive Equivalence Between Decidable Freeze and Metric Timed Temporal Logics. | Hsi-Ming Ho, Shankara Narayanan Krishna, Khushraj Madnani, Rupak Majumdar, Paritosh K. Pandya |
| 2023 | CONCUR | Satisfiability Checking of Multi-Variable TPTL with Unilateral Intervals Is PSPACE-Complete. | Shankara Narayanan Krishna, Khushraj Nanik Madnani, Rupak Majumdar, Paritosh K. Pandya |
| 2021 | FM | Generalizing Non-punctuality for Timed Temporal Logic with Freeze Quantifiers. | Shankara Narayanan Krishna, Khushraj Madnani, Manuel Mazo Jr., Paritosh K. Pandya |
| 2019 | MEMOCODE | Logical specification and uniform synthesis of robust controllers. | Paritosh K. Pandya, Amol Wakankar |
| 2018 | CONCUR | Logics Meet 1-Clock Alternating Timed Automata. | Shankara Narayanan Krishna, Khushraj Madnani, Paritosh K. Pandya |
| 2018 | CSL | An Algebraic Decision Procedure for Two-Variable Logic with a Between Relation. | Andreas Krebs, Kamal Lodaya, Paritosh K. Pandya, Howard Straubing |
| 2017 | MFCS | Making Metric Temporal Logic Rational. | Shankara Narayanan Krishna, Khushraj Madnani, Paritosh K. Pandya |
| 2017 | SEFM | Formalizing Timing Diagram Requirements in Discrete Duration Calculus. | Raj Mohan Matteplackel, Paritosh K. Pandya, Amol Wakankar |
| 2016 | FOSSACS | Metric Temporal Logic with Counting. | Shankara Narayanan Krishna, Khushraj Madnani, Paritosh K. Pandya |
| 2016 | LICS | Two-variable Logic with a Between Relation. | Andreas Krebs, Kamal Lodaya, Paritosh K. Pandya, Howard Straubing |
| 2014 | ICTAC | On Unary Fragments of MTL and TPTL over Timed Words. | Khushraj Madnani, Shankara Narayanan Krishna, Paritosh K. Pandya |
| 2014 | TIME | Partially Punctual Metric Temporal Logic is Decidable. | Khushraj Madnani, Shankara Narayanan Krishna, Paritosh K. Pandya |
| 2013 | ICTAC | Deterministic Logics for UL. | Paritosh K. Pandya, Simoni S. Shah |
| 2012 | ATVA | The Unary Fragments of Metric Interval Temporal Logic: Bounded versus Lower Bound Constraints. | Paritosh K. Pandya, Simoni S. Shah |
| 2011 | CONCUR | On Expressive Powers of Timed Logics: Comparing Boundedness, Non-punctuality, and Deterministic Freezing. | Paritosh K. Pandya, Simoni S. Shah |
| 2010 | DLT | Around Dot Depth Two. | Kamal Lodaya, Paritosh K. Pandya, Simoni S. Shah |
| 2009 | LATA | Determinization and Expressiveness of Integer Reset Timed Automata with Silent Transitions. | P. Vijay Suman, Paritosh K. Pandya |
| 2008 | DAC | Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts. | Swarup Mohalik, A. C. Rajeev, Manoj G. Dixit, S. Ramesh, P. Vijay Suman, Paritosh K. Pandya, Shengbing Jiang |
| 2008 | SYNASC | Timed and Hybrid Automata in SAL. | P. Vijay Suman, Paritosh K. Pandya |
| 2007 | TACAS | On Sampling Abstraction of Continuous Time Logic with Durations. | Paritosh K. Pandya, Shankara Narayanan Krishna, Kuntal Loya |
| 2006 | ICWS | Representation, Verification, and Computation of Timed Properties in Web. | Raman Kazhamiakin, Paritosh K. Pandya, Marco Pistore |
| 2006 | TACAS | Efficient Guided Symbolic Reachability Using Reachability Expressions. | Dina Thomas, Supratik Chakraborty, Paritosh K. Pandya |
| 2005 | TACAS | Bounded Validity Checking of Interval Duration Logic. | Babita Sharma, Paritosh K. Pandya, Supratik Chakraborty |
| 2003 | CAV | Digitizing Interval Duration Logic. | Gaurav Chakravorty, Paritosh K. Pandya |
| 2001 | TACAS | Model Checking CTL*[DC]. | Paritosh K. Pandya |
| 1995 | CSL | Some Extensions to Propositional Mean-Value Caculus: Expressiveness and Decidability. | Paritosh K. Pandya |
| 1993 | FM | Verification Tools in the Development of Provably Correct Compilers. | M. R. K. Krishna Rao, Paritosh K. Pandya, R. K. Shyamasundar |