| 2008 | CASES | Comprehensive isomorphic subtree enumeration. | Partha Biswas, Girish Venkataramani |
| 2006 | DATE | Automatic identification of application-specific functional units with architecturally visible storage. | Partha Biswas, Nikil D. Dutt, Paolo Ienne, Laura Pozzi |
| 2006 | VLSID | Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core. | Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Paolo Ienne, Laura Pozzi |
| 2005 | DATE | ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement. | Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Laura Pozzi, Paolo Ienne |
| 2004 | DAC | Introduction of local memory elements in instruction set extensions. | Partha Biswas, Vinay Choudhary, Kubilay Atasu, Laura Pozzi, Paolo Ienne, Nikil D. Dutt |
| 2003 | CASES | Reducing code size for heterogeneous-connectivity-based VLIW DSPs through synthesis of instruction set extensions. | Partha Biswas, Nikil D. Dutt |
| 2002 | DATE | An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs. | Ashok Halambi, Aviral Shrivastava, Partha Biswas, Nikil D. Dutt, Alexandru Nicolau |