| 2016 | DDECS | A rule-based approach for minimizing power dissipation of digital circuits. | Subrata Das, Parthasarathi Dasgupta, Petr Fiser, Sudip Ghosh, Debesh Kumar Das |
| 2014 | DDECS | A layout based customized testing technique for total microfluidic operations in digital microfluidic biochips. | Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta |
| 2014 | ISCAS | Automated two stage detection and analyzer system in multipartitioned Digital Microfluidic Biochips. | Pranab Roy, Aatreyi Bal, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta |
| 2014 | VLSID | A Novel Wire Planning Technique for Optimum Pin Utilization in Digital Microfluidic Biochips. | Pranab Roy, Samadrita Bhattacharya, Rupam Bhattacharyay, Firdousi Jamil Imam, Hafizur Rahaman, Parthasarathi Dasgupta |
| 2013 | ISCAS | Digital microfluidic system: A new design for heterogeneous sample based integration of multiple DMFBs. | Pranab Roy, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta |
| 2012 | VLSID | A Heuristic Method for Co-optimization of Pin Assignment and Droplet Routing in Digital Microfluidic Biochip. | Ritwik Mukherjee, Hafizur Rahaman, Indrajit Banerjee, Tuhina Samanta, Parthasarathi Dasgupta |
| 2009 | VLSID | A Method for the Multi-Net Multi-Pin Routing Problem with Layer Assignment. | Tuhina Samanta, Hafizur Rahaman, Prasun Ghosal, Parthasarathi Dasgupta |
| 2006 | CIT | Multiobjective Genetic Algorithm for k-way Equipartitioning of a Point Set with Application to CAD-VLSI. | Sriparna Saha, Susmita Sur-Kolay, Sanghamitra Bandyopadhyay, Parthasarathi Dasgupta |
| 2006 | ISCAS | A heuristic method for constructing hexagonal Steiner minimal trees for routing in VLSI. | Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Parthasarathi Dasgupta |
| 2006 | VLSID | Linear Required-Arrival-Time Trees and their Construction. | Parthasarathi Dasgupta, Prashant Yadava |
| 2005 | VLSID | Revisiting VLSI Interconnects in Deep Sub-Micron: Some Open Questions. | Parthasarathi Dasgupta |
| 2004 | VLSID | Physical Design Trends and Layout-Based Fault Modeling. | Susmita Sur-Kolay, Parthasarathi Dasgupta, Bhargab B. Bhattacharya, Sujit T. Zachariah |
| 2003 | DATE | A Novel Metric for Interconnect Architecture Performance. | Parthasarathi Dasgupta, Andrew B. Kahng, Swamy Muddu |
| 1996 | VLSID | Geometric bipartitioning problem and its applications to VLSI. | Parthasarathi Dasgupta, Anup K. Sen, Subhas C. Nandy, Bhargab B. Bhattacharya |
| 1995 | ICCAD | A unified approach to topology generation and area optimization of general floorplans. | Parthasarathi Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya |