Parthasarathy P. Tirumalai
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
1990–1992
Best venue rank
A*
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1992 | MICRO | Code generation schema for modulo scheduled loops. | B. Ramakrishna Rau, Michael S. Schlansker, Parthasarathy P. Tirumalai |
| 1992 | PLDI | Register Allocation for Software Pipelined Loops. | B. Ramakrishna Rau, Meng Lee, Parthasarathy P. Tirumalai, Michael S. Schlansker |
| 1990 | SC | Parallelization of loops with exits on pipelined architectures. | Parthasarathy P. Tirumalai, Meng Lee, Michael S. Schlansker |