Pathik Viramgama
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2017–2017
Best venue rank
National
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2017 | VLSID | Characterization of a Novel 10T Low-Voltage SRAM Cell with High Read and Write Margin for 20nm FinFET Technology. | Mitesh Limachia, Pathik Viramgama, Rajesh Amratlal Thakker, Nikhil Kothari |