| 2006 | MMSP | Objective Human Visual System Based Video Quality Assessment Metric for Low Bit-Rate Video Communication Systems. | David Chih-Che Lin, Paul M. Chau |
| 2000 | CATA | Image encryption for multimedia applications. | Philip P. Dang, Paul M. Chau |
| 1999 | CATA | FPGA architecture for noise filters on a reconfigurable processor. | Philip P. Dang, Paul M. Chau |
| 1999 | ISCAS | A 1.2 GHz CMOS quadrature self-oscillating mixer. | Michael B. Bendak, Baernard A. Xavier, Paul M. Chau |
| 1998 | FPGA | Reconfigurable Processing for Robust Navigation and Control (Abstract). | Jeanette F. Arrigo, Kevin J. Page, Paul M. Chau, N. C. Tien |
| 1998 | ICASSP | Blind signal separation with a projection pursuit index. | Amir Sarajedini, Paul M. Chau |
| 1998 | IVCNZ | A Feature Extraction Application on a Reconfigurable Image Processor. | Philip P. Dang, Paul M. Chau |
| 1994 | DAC | Rapid Prototyping of ASIC Based Systems. | Patrick H. Kelly, Kevin J. Page, Paul M. Chau |
| 1994 | ICCD | Microarchitectural Synthesis of Performance-Constrained, Low-Power VLSI Designs. | Laurence Goodby, Alex Orailoglu, Paul M. Chau |
| 1993 | DAC | Untitled record | Takeo Hamada, Chung-Kuan Cheng, Paul M. Chau |
| 1993 | ICASSP | Recursive least squares problem implementation on a generalized interconnection of DSP processors. | Sati Banerjee, Paul M. Chau |
| 1993 | ICNP | Enhancing SCI's fairness protocol for increased throughput. | Dan Picker, Ronald D. Fellman, Paul M. Chau |
| 1992 | DAC | A Wire Length Estimation Technique Utilizing Neighborhood Density Equations. | Takeo Hamada, Chung-Kuan Cheng, Paul M. Chau |
| 1992 | ICASSP | Macropipelining based heterogeneous multiprocessor scheduling. | Takeo Hamada, Sati Banerjee, Paul M. Chau, Ronald D. Fellman |
| 1992 | ICASSP | Sigma-delta encoding for efficient equalization of prefilter based FIR filters. | Scott R. Powell, Paul M. Chau |
| 1990 | ICASSP | KINFIDA: an object-oriented model-based digital filter design assistant. | Amir Hekmatpour, Scott R. Powell, Paul M. Chau |
| 1990 | IJCNN | A neural network architecture for the decoding of long constraint length convolutional codes. | Michael D. Alston, Paul M. Chau |
| 1987 | ICASSP | A bit-serial floating-point complex multiplier-accumulator for fault-tolerant digital signal processing arrays. | Paul M. Chau, Kay-Cheung Chew, Walter H. Ku |
| 1984 | ICASSP | Digital signal processing capabilities of CUSP, a high performance bit-serial VLSI processor. | Richard W. Linderman, Peter P. Reusens, Paul M. Chau, Walter H. Ku |