Paul Muller
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
8
Venues
7
Active years
2005–2025
Best venue rank
A*
Where they publish
Papers
8 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | IJCAI | Combining Deep Reinforcement Learning and Search with Generative Models for Game-Theoretic Opponent Modeling. | Zun Li, Marc Lanctot, Kevin R. McKee, Luke Marris, Ian Gemp, Daniel Hennes, Paul Muller, Kate Larson, Yoram Bachrach, Michael P. Wellman |
| 2022 | ICML | Scalable Deep Reinforcement Learning Algorithms for Mean Field Games. | Mathieu Laurire, Sarah Perrin, Sertan Girgin, Paul Muller, Ayush Jain, Theophile Cabannes, Georgios Piliouras, Julien Prolat, Romuald Elie, Olivier Pietquin, Matthieu Geist |
| 2021 | ICML | Multi-Agent Training beyond Zero-Sum with Correlated Equilibrium Meta-Solvers. | Luke Marris, Paul Muller, Marc Lanctot, Karl Tuyls, Thore Graepel |
| 2020 | ICLR | A Generalized Training Approach for Multiagent Learning. | Paul Muller, Shayegan Omidshafiei, Mark Rowland, Karl Tuyls, Julien Prolat, Siqi Liu, Daniel Hennes, Luke Marris, Marc Lanctot, Edward Hughes, Zhe Wang, Guy Lever, Nicolas Heess, Thore Graepel, Rmi Munos |
| 2006 | ISCAS | Analysis and modeling of jitter and frequency tolerance in gated oscillator based CDRs. | Armin Tajalli, Paul Muller, Seyed Mojtaba Atarodi, Yusuf Leblebici |
| 2005 | DATE | Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit. | Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi, Yusuf Leblebici |
| 2005 | FDL | Jitter Tolerance Analysis of Clock and Data Recovery Circuits. | Paul Muller, Yusuf Leblebici |
| 2005 | ISLPED | A low-power, multichannel gated oscillator-based CDR for short-haul applications. | Armin Tajalli, Paul Muller, Seyed Mojtaba Atarodi, Yusuf Leblebici |